Student Poster Session

​System in package has raised research interest in RF/mm-wave applications (such as 5G) for its short interconnect length and capacity to enable heterogeneous integration. A polylithic integration technology, as a type of system in package, is demonstrated for seamless stitching of chiplets, which is enabled by fused-silica stitch-chips. The objective is to demonstrate the stitch-chip's low-loss electrical performance. A testbed using thru-only de-embedding and L-2L de-embedding technique is designed, simulated, fabricated, and assembled. The stitch-chip signal channel is measured to have less than 0.4 dB insertion loss up to 30 GHz with return loss larger than 15 dB. The insertion loss is 3.6 dB lower than conventional Si interposer channel with the same dimensions. It is also closed and lower than other technologies including LTCC and glass carrier but with the simplicity of design, fabrication, and assembly.